首先对于HDMI来说,接收端可以直接获取到音频抽样频率,以下是HDMI1.4协议中相关部分的原文Whenever transmitting a valid audio stream, HDMI Sources shall always include valid and correct information in Channel Status bits 24 through 27. For L-PCM audio, these bits shall indicate the audio sample frequency. For compressed audio formats, these bits shall indicate the IEC 60958 frame rate.For One Bit Audio, sample frequency information is carried in the Audio InfoFrame.所以从理论上构建异步时钟是可行的协议中同样定义了一组N/CTS参数用于构建同步时钟,OPPO测试中描述的同步时钟方案其实就是协议提供的参考方案,我上面回复中也有提到至于实际中是否存在使用异步时钟方案的产品,OPPO原文的相关部分如下Once the signal reaches the receiving end, for PCM and DSD audio, the reconstructed audio clock is usually used directly to drive the audio data. As a result, the HDMI audio jitter reduction circuit can improve the sound quality of PCM and DSD audio directly. For bitstream audio in compressed formats such as Dolby Atmos, Dolby TrueHD, DTS:X or DTS-HD Master, the jitter reduction benefit depends on whether the decoder design in the audio processor/receiver uses a synchronous or asynchronous clock. Compressed audio decoding requires buffering of the audio data and performing mathematic manipulations. If the decoder uses a synchronous clock design, the decoded data is usually driven out with a clock that is 1x, 2x, or 4x that of the reconstructed audio clock but synchronised to it, so the benefit can carry over. If the decoder uses a completely new, locally generated clock to drive out the decoded data, then jitter reduction on the player side is not a benefit, but the same circuit ensures error-free delivery of the bitstream audio data to the decoder thanks to a very stable HDMI video clock and a constant CTS value.In order to isolate the benefit of the UDP-205’s HDMI jitter reduction circuit, the engineers intentionally selected a lower end mass market A/V processor for this experiment. The reason is that some high-end A/V processors have their own clock regeneration or clock isolation circuit, so the test result may be attributed to the A/V processor’s design rather than the UDP-205. Using a mass market A/V processor may not reveal the best possible performance from the UDP-205, but the key here is to identify the sidebands to see how the jitter reduction circuit performs.以上部分其实楼主已经提到了,所以我才说让你去一楼看看OPPO这篇测试里提到PCM和DSDusually使用同步时钟模式,这一点我在2楼的回复中就有提到,我之所以说PCM和DSD也可以使用异步时钟模式,就是因为上面HDMI1.4协议中提到的对于PCM和DSD来说也同样在数据包中直接携带了抽样频率,所以理论上跟源码输出是一样的这就是我所谓的“结合理论和OPPO的测试”我也是看你上面的回复认为你是了解信号处理相关知识的,所以才回帖聊一下,打嘴仗没什么意思
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